DSP

F28335 ePWM模块完整配置 源代码+注释

2019-07-13 16:15发布

class="markdown_views prism-atom-one-light"> 这个代码的功能
是在ePWMA 即GPIO0口输出一个周期为100us,占空比为50%的PWM波。 #include "DSP2833x_Device.h" #include "DSP2833x_Examples.h" #if (CPU_FRQ_150MHZ) #define CPU_CLK 150e6 #endif #if (CPU_FRQ_100MHZ) #define CPU_CLK 100e6 #endif #define PWM_CLK 10e3 #define SP CPU_CLK/(2*PWM_CLK) #define TBCTLVAL 0x200A void EPwmSetup() { InitEPwm1Gpio(); EPwm1Regs.TBSTS.all=0; //时基状态寄存器初始化 EPwm1Regs.TBPHS.half.TBPHS=0; //时基相位寄存器清0 EPwm1Regs.TBCTR=0; //时基计数器清0 EPwm1Regs.TBCTL.bit.CTRMODE=TB_UP_DOWN; //计数模式 EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE; //禁止相位寄存器 EPwm1Regs.TBCTL.bit.PRDLD=TB_IMMEDIATE; //禁止影子寄存器,即刻装载模式 EPwm1Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_DISABLE;//禁止同步信号输出 EPwm1Regs.TBCTL.bit.SWFSYNC=0; //禁止强制脉冲 EPwm1Regs.TBCTL.bit.HSPCLKDIV=TB_DIV1; //高速时钟分频 1倍分频 EPwm1Regs.TBCTL.bit.CLKDIV=TB_DIV1; //时基时钟分频 1倍分频 EPwm1Regs.TBCTL.bit.PHSDIR=0; //同步信号来时 向下计数 EPwm1Regs.TBCTL.bit.FREE_SOFT=0; //仿真模式位,为0 即可一般不设置 EPwm1Regs.TBPRD=SP; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_LD_DISABLE; //禁止影子寄存器A装载 EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_LD_DISABLE; //禁止影子寄存器B装载 EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE; //CMPA立即装载 EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE; //CMPB立即装载 EPwm1Regs.CMPA.half.CMPA =SP/2; EPwm1Regs.CMPB=0; EPwm1Regs.AQCTLA.bit.CAU= AQ_SET; // CTR上升至CMPA值 置1 ePWMA输出高 EPwm1Regs.AQCTLA.bit.CAD= AQ_CLEAR; // CTR下降至CMPA值 置0 ePWMA输出低 EPwm1Regs.AQCTLB.bit.CBU= AQ_SET; // CTR上升至CMPB值 置1 ePWMB输出高 EPwm1Regs.AQCTLB.bit.CBD= AQ_CLEAR; // CTR下降至CMPB值 置0 ePWMB输出低 EPwm1Regs.AQSFRC.all=0; //动作强制寄存器清0 EPwm1Regs.AQCSFRC.all=0; EPwm1Regs.DBCTL.bit.OUT_MODE=0X03; //死区使能双边沿延时 EPwm1Regs.DBRED=0; //死区上升沿延时计数器 EPwm1Regs.DBFED=0; //死区下降沿延时计数器 EPwm1Regs.TZSEL.all=0; //联防关闭 EPwm1Regs.TZCTL.all=0; EPwm1Regs.TZEINT.all=0; EPwm1Regs.TZFLG.all=0; EPwm1Regs.TZCLR.all=0; EPwm1Regs.TZFRC.all=0; EPwm1Regs.ETSEL.all=0; //事件触发关闭 EPwm1Regs.ETFLG.all=0; EPwm1Regs.ETCLR.all=0; EPwm1Regs.ETFRC.all=0; EPwm1Regs.PCCTL.all=0; //斩波关闭 }