TMS320VC5502EMIF外接flash配置问题

2019-03-26 14:37发布

萌新,求助各位朋友:
       问题如下:TMS320VC5502芯片CE1引脚接S29AL008的Flash,我想知道除了EMIF_CE01,EMIF_CE02寄存器需要配置之外,以下初始化中还有哪个部分需要配置。在网上找了一些资料讲的没有很具体,也看了点数据手册,原谅全英文理解的有点差劲。希望指点,谢谢。
void SDRAM_init( void )
{
    ioport unsigned int *XBCR    =(unsigned int *)0x8800;
    ioport unsigned int *EMIF_GCTL1    =(unsigned int *)0x800;
    ioport unsigned int *EMIF_GCTL2    =(unsigned int *)0x801;
    ioport unsigned int *EMIF_CE11     =(unsigned int *)0x802;
    ioport unsigned int *EMIF_CE12     =(unsigned int *)0x803;
    ioport unsigned int *EMIF_CE01     =(unsigned int *)0x804;
    ioport unsigned int *EMIF_CE02     =(unsigned int *)0x805;
    ioport unsigned int *EMIF_CE21     =(unsigned int *)0x808;
    ioport unsigned int *EMIF_CE22     =(unsigned int *)0x809;
    ioport unsigned int *EMIF_CE31     =(unsigned int *)0x80A;
   ioport unsigned int *EMIF_CE32     =(unsigned int *)0x80B;
    ioport unsigned int *EMIF_SDCNT1    =(unsigned int *)0x80C;
    ioport unsigned int *EMIF_SDCNT2    =(unsigned int *)0x80D;
    ioport unsigned int *EMIF_SDREF1    =(unsigned int *)0x80E;
    ioport unsigned int *EMIF_SDREF2    =(unsigned int *)0x80F;
    ioport unsigned int *EMIF_SDEXT1    =(unsigned int *)0x810;
    ioport unsigned int *EMIF_SDEXT2    =(unsigned int *)0x811;
    ioport unsigned int *EMIF_CE1SECCTL1 =(unsigned int *)0x822;
    ioport unsigned int *EMIF_CE1SECCTL2 =(unsigned int *)0x823;
    ioport unsigned int *EMIF_CE0SECCTL1 =(unsigned int *)0x824;
    ioport unsigned int *EMIF_CE0SECCTL2 =(unsigned int *)0x825;
    ioport unsigned int *EMIF_CE2SECCTL1 =(unsigned int *)0x828;
    ioport unsigned int *EMIF_CE2SECCTL2 =(unsigned int *)0x829;
    ioport unsigned int *EMIF_CE3SECCTL1 =(unsigned int *)0x82A;
    ioport unsigned int *EMIF_CE3SECCTL2 =(unsigned int *)0x82B;
    ioport unsigned int *EMIF_CECTL1     =(unsigned int *)0x840;
    ioport unsigned int *EMIF_CECTL2    =(unsigned int *)0x841;
    *XBCR   =0x0;
    *EMIF_GCTL1   =0x277C;
    *EMIF_GCTL2   =0x0009;
    *EMIF_CE11   =0xFF13;
    *EMIF_CE12   =0xFFFF;
    *EMIF_CE01   =0xFF93;
    *EMIF_CE02   =0xFFFF;
    *EMIF_CE21   =0xFF23;
    *EMIF_CE22   =0xFFFF;
    *EMIF_CE31   =0xFF13;
    *EMIF_CE32   =0xFFFF;
    *EMIF_SDCNT1  =0xF000;
    *EMIF_SDCNT2  =0x0648;
    *EMIF_SDREF1  =0x1001;
    *EMIF_SDREF2  =0x0000;
    *EMIF_SDEXT1  =0x5F3F;
    *EMIF_SDEXT2  =0x0017;
    *EMIF_CE1SECCTL1 =0x0002;
    *EMIF_CE1SECCTL2 =0x0000;
    *EMIF_CE0SECCTL1 =0x0002;
    *EMIF_CE0SECCTL2 =0x0000;
    *EMIF_CE2SECCTL1 =0x0002;
    *EMIF_CE2SECCTL2 =0x0000;
    *EMIF_CE3SECCTL1 =0x0002;
    *EMIF_CE3SECCTL2 =0x0000;
    *EMIF_CECTL1   =0x0000;
    *EMIF_CECTL2   =0x0000;
}



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